Jack Ou, Ph.D.

Associate Professor, Electrical and Computer Engineering, California State University
Ph,D., M.S., and B.S. Rutgers University (New Brunswick Campus)
Research Interest: CMOS analog/RF integrated circuits

Course Related Projects :
1. ECE 440 High speed inverter-based psedudo-differential three stage operational amplifier, B+ or higher in ECE 340/ECE 440.
2. ECE 442, Determination of logical effort parameters for 180 nm CMOS process, design of an integrated SRAM circuit, B+ or higher in ECE 442, concurrent registration in ECE 526/L preferred.
3. ECE 443, Binary weighted charge scaling DAC, serial charge-based DAC, inverter based ADC, B+ or higher in ECE 442, concurrent registration in ECE 526/L.
4. ECE 595, Low-power neuromorphic circuit, A- or higher in ECE 595.
5. ECE 648, Design of N-path filter, design of integrated tapped-C transformer, A- or higher in ECE 648 and ECE 595.
6. ECE 649, Systematic design of transconductance-C filter, A- or higher in ECE 649 and ECE 595.
7. ECE 642, Design of subtreshold CMOS receiver, A- or higher in ECE 642 and ECE 595.
8. Automatic imaging of duckweed using planCV(Python).