Home Welcome

MISSION OF MICROELECTRONICS ENGINEERING LABORATORY

The future mission of the Microelectronics Engineering Laboratory (MEL) at the California State University Northridge, Northridge is to perform education and research development in area of electronic and optoelectronic devices. The MEL will assist:

  • To provide opportunities to perform the research in discrete electronic and optoelectronic devices for academic as well as industrial users.
  • To provide the training and experience for undergraduate and graduate students to successfully achieve a rewarding career in microelectronics engineering.
  • To strongly contribute to advancements in microelectronics engineering for electronic and optoelectronic devices development.

This enterprising effort includes the state-of the-art on developing process technology and device and process simulation for silicon based electronic and optoelectronic devices based on fundamental research. In order to accomplish that the MEL CSUN has built the facility and collaborated with the University of Texas Austin and Skyworks Solution Inc., CA.


The MEL facility is capable to fabricate all kind of silicon based discrete devices such as rectifying diode, IMPATT diode, Avalanche photodiode, switching diode, bipolar and MOS devices, MESFET, OPFET and other devices.

The Microelectronics Engineering Laboratory at the California State University Northridge at Northridge is a research laboratory funded by the US Department of Defense.


CSUN faculty is actively involved in developing fundamental research on device modeling and process modeling for high speed and high frequency devices, low noise device and high power devices and processing technologies, including:

  • Low dark current Schottky diode photodetectors with transparent contacts.
  • GaAs MESFET for high speed operation.
  • High power and high frequency SiC MESFET
  • Avalanche photodetector
  • Solar blind photodetector.
  • Devices for bio-medical application

Semiconductor Processing Cleanrooms for Microfabrication

This laboratory includes 1500 square feet of class 100, and class 10000 areas. There are facilities to process and fabricate the MOS, bipolar, FETs, optoelectronics, and photovoltaics devices. The processing equipment include a diffusion furnace, nano-cal ellipsometer; DekTak profilomiter; Karl Suss MA56 mask aligner; Nano-Calc Thinfilm Spectroscopic Refelectometer, four Cooke Vacuum sputtering systems, Kurt J. Lesker PVD -75 system, annealing, oxidation and diffusion furnaces; Kenworth probe station with Hewlett-Packard 4145; 4-point probe; wet chemical clean benches, etc. In addition to ECE faculty, staff and students, the facilities are available to researchers from Physics, Material Science, Chemical Engineering, Chemistry, Mechanical Engineering, and from outside California State University Northridge. Arrangements for access by non-lab personnel for foundry service facilities can be made by contacting Cleanroom Manager Charles B. Overton.

Members of Clean Room

StaffMembers / Visiting Scientists – Charles B.Overton, Dr. Subba Kodigala, Dr. Dhruvajyoti Roy

Students – Karthik Vishwanadh, Rahul Reddy Kambalapally, Avinash Chowdary, Sruthi Nair, Sarah, Divakar Vedati, Narendra Varma Uddaraju

About Professor Somnath Chattopadhayay

Current Position

Faculty in the Department of Electrical and Computer Engineering
Coordinator of Microelectronics Laboratory
Principal Investigator of Research Project funded by US Department of Defense


Education

Ph.D. Degree in Electronics Engineering earned from the Department of Electronics Engineering, Institute of Technology, Banaras Hindu University in 1989
M. Tech. (Master of Technology) Post-graduate degree in Microelectronics Engineering earned from the Department of Electronics Engineering, Institute of Technology, Banaras Hindu University in 1984.

B.E. (Bachelor of Engineering) Graduate degree in electronics engineering earned from M.M.M. Engineering College,
University of Gorakhpur in 1981.



Previous Positions

Faculty in the Department of Electrical and Computer Engineering, California State University Fresno, 2002-2005.
Process Engineer in the International Radiation Detectors,Torrance, 2000-2001
Team leader of fabrication group for developing IMPATT diode at the Center for Advanced Study in Radio-Physicsand Electronics, University of Calcutta, 1999-2000.
General Manager and Head of the Wafer Fab for production and research and development of semiconductor devices at USHA India Ltd. India, 1996-1998.
Research Scientist at the Institute of High Frequency Technique, TH-Darmstadt University, Germany, awarded by the Alexander von Humboldt Foundation, 1993-1995.
Ad-hoc faculty and research fellow at the Department of Electronics Engineering, Banaras Hindu University, India,1989-1992.

Awards

Fellowship awarded by the Alexander von Humboldt Foundation, Germany, 1993.
Research grant awarded by the US Department of Defense, 2005.
Research grant awarded by the US Department of Defense, 2012.
Research grant awarded by the US Department of Defense, 2012.

Services What We Do

ECE 340: Electronics I

Linear, piecewise-linear, and nonlinear models for active devices and their interaction with passive network elements. Characteristics and behavior of operational amplifiers, diodes and transistors. Small signal amplifiers and their analysis at low, midband and high frequencies. 3 hours lecture; one 3-hour lab per week.

Textbook and/or Other Required Material:

  • Sedra AS and Smith KC: Microelectronic Circuits, Oxford University Press, 5th edition, 2003, ISBN: 0195142519
  • http://www.sedrasmith.com/
  • PSPICE, by OrCAD Corporation http://www.orcad.com/

ECE 445:Introduction to Solid State Devices

Electric and magnetic properties of materials are examined with emphasis on engineering applications. Typical devices which are considered include ohmic and non-ohmic contacts, voltaic cells, PN junction devices, ferroelectric energy converters, ferrite devices and integrated circuits.

Textbook and/or Other Required Material:

  • Streetman B, and Banerjee S: Solid State Electronic Devices, Prentice Hall, 6th edition, 2005, ISBN: 013149726X

ECE 545: Solid State Devices

In-depth study of semiconductor materials and solid state devices. Energy bands and charge carriers, excess carriers in semiconductors, P-N junctions, bipolar junction transistors (BJTs), field effect transistors (FETs), integrated circuits (IC) will be covered in detail. Practical aspects of dielectric and magnetic devices are also treated.

Textbook and/or Other Required Material:

  • Sze SM, and Ng KK: Physics of Semiconductor Devices, Wiley-Interscience, 3rd edition, 2006, ISBN: 0471143235

ECE 546: Very Large Scale Integrated Circuit Design

Survey of VLSI technology and very large scale integrated systems. Problems which occur when ordinary circuits are replicated to involve millions of devices. CMOS technology, design styles up to the point of submission for fabrication. Computerized methods with high density circuits with optimized speed and power consumption. Students perform simple layouts and simulations suitable for extension to a very large scale.

Textbook and/or Other Required Material:

  • Baker RJ: CMOS Circuit Design, Layout, and Simulation, Wiley-IEEE Press, 2nd Edition, 2004, ISBN: 047170055X
  • http://cmosedu.com/

ECE695DFP: Microelectronics Device Fabrication Principles

Prerequistes: ECE 545 or ECE 445. Fabrication process physics as well as fabrication and characterization systems. This course deals with impurity doping processes such as diffusion, ion implantation and epitaxy techniques, thin film deposition, etching process and photolithographic process, device failure analysis, device yield analysis, software development for process model.

Portfolio Our Works

News Latest Posts

Publications

S.N. Chattopadhyay, et al, “Optically Controlled silicon MESFET fabrication and Characterization for optical modulator/demodulator”, Journal of Semiconductor Technology and Science, Vol.10, No.3, pp.213-224, 2010.

S.N. Chattopadhyay, et al, “Simulation of 4H-SiC MESFET for High Power and High Frequency Response”, Journal of Semiconductor Technology and Science, Vol.8, No.3, pp.251-263, 2008.

S.N. Chattopadhyay, et al, “ Optically Controlled Silicon MESFET Modeling Considering Diffusion Process”, Journal of Semiconductor Technology and Science, Vol.7, No.3, pp.196-208, 2007.

S.N. Chattopadhyay and B.B. Pal. "Effect of Local Oscillator and Modulating Signal on the Performance of an Ion Implanted GaAs OPFET", IETE Journal of Research, Vol.45, No.2, pp.115, 1999.

B.B. Pal and S.N. Chattopadhyay. "Scaling Rule for OPFET", IEEE Trans. on Electron Devices, Vol.ED-43, No.2, pp.368-369, 1996.

S.N. Chattopadhyay, I. Aller and H.L. Hartnagel. "Detailed Transport modeling of Experiment Behavior of Light Plasma Damaged Epitaxial InP", Int. Journal of Electronics, Vol.79, pp.561-565, 1995.

B.B. Pal, S.N. Chattopadhyay, et al,"Time Dependent Analysis of an Ion Implanted GaAs OPFET", IEEE Trans. on Electron Devices, Vol.ED-41, pp.491-498, 1994.

B.B. Pal and S.N. Chattopadhyay. "GaAs OPFET Characteristics Considering the Effect of Gate Depletion Width Modulation due to Incident Radiation", IEEE Trans. on Electron Devices, Vol.ED-39, pp.1021-1027, 1992.

S.N. Chattopadhyay and B.B. Pal. "GaAs MESFET Modeling Considering the Effect of Rapid Thermal Annealing", IETE Journal of Research, Vol.38, pp.112-116, 1992.

S.N. Chattopadhyay, D. Dutta, and B.B. Pal. "Electrical Characteristics of an Ion Implanted p-Ga0.47In0.53As MESFET at Different Schottky Barrier Heights", Solid State Electronics, Vol.33, pp.963-967, 1990.

S.N. Chattopadhyay and B.B. Pal. "On the Scaling of Ion Implanted Si MESFET", Solid State Electronics, Vol.32, pp. 119-123, 1989.

S.N. Chattopadhyay and B.B. Pal. "The Effect of Annealing on the Switching Characteristics of an Ion-Implanted Silicon MESFET", IEEE Trans.on Electron devices, Vol.ED-36, pp.920-929, 1989.

S.N. Chattopadhyay and B.B. Pal. "Analytical Modeling an Ion-Implanted Silicon MESFET in Post-Anneal Condition", IEEE Trans. on Electron Devices, Vol.ED-36, pp.81-87, 1989.

S.N. Chattoapdhyay and B.B. Pal. "A Unified Model for MESFET Analysis", Semiconductor Science and Technology, Vol.3, pp.185-190, 1989.

S.N. Chattopadhyay and B.B. Pal. "Accurate Modeling of an Ion Implanted MESFET", Solid State Electronics, Vol.3, pp.391-396, 1987.

V.K. Singh, S.N. Chattopadhyay and B.B. Pal. "Optically Cntrolled Characteristics in an Ion Implanted MESFET", Solid State Electronics, Vol.29, pp.707-711, 1986.

S.N. Chattopadhyay, N. Motoyama, A. Rudra, A. Sharma, S. Sriram, C.B. Overton and P. Pandey. "Optically Controlled Silicon Based MESFET Modelling Considering Diffusion Process" , accepted for publication in the Journal of Semiconductor Technology and Science tentatively scheduled for publication in Vol. 7, No. 3, September, 2007

B.B. Pal, S.N. Chattopadhyay, et.al.. "Time dependent analysis of an ion implanted GaAs OPFET", IEEE Trans. On Electron Devices, Vol.ED-41, pp.491-498, 1994.

Research Publications in Symposia

B.B. Pal and S.N. Chattopadhyay. "Scaling down OPFET for optical integration", IEEE (India) Annual Convention and Exhibition, Calcutta, Nov.21-23, 1992.

B.B. Pal, H. Mitra, D.P. Singh and S.N. Chattopadhyay. "Optically controlled characteristics of HEMT", Proceedings of SPIE Conference on Emerging Optoelectronics Technology, pp.270-275, TATA Mc Graw Hill, Dec. 18-20, 1991, IISC Bangalore, India.

B.B. Pal and S.N. Chattopadhyay. "Photovoltaic effect on microwave characteristics of ion implanted GaAs OPFET", Proceedings of Photovoltaic Science Emerging Conference, pp. 1089-1093, Oxford and IBH, Feb. 10-14, 1989, New Delhi, India.

S.N. Chattopadhyay and B.B. Pal. "Characterization of post annealed ion implanted Si MESFET", International Conference and intensive tutorial course on semiconductor materials, New Delhi, Dec. 11-16, 1989.

S.N. Chattopadhyay and B.B. Pal. "An unified model for MESFET device", Vth National seminar on semiconductor devices, Indian Association for the Cultivation of Science, Calcutta, India, Dec. 10-12, 1986.

S.N. Chattopadhyay and B.B. Pal. "Device modeling of an ion implanted GaAs MESFET considering both Gaussian and exponential distribution of impurities", Proceedings of 2nd International Workshop on physics of semiconductor devices, p.98, Dec. 5-10, 1983, New Delhi.

Current Research Activity

OPFET device and process modeling.
Process technology development of photolithography process optimization, impurity doping optimization using diffusion process, Aluminum and Indium Tin Oxide thin film deposition by sputtering process for ohmic contact and transparent Schottky gate formation.
Device process integration.
Device characterizations and failure analysis.
Silicon Carbide based MESFET device and process simulations development.

Projects Undertaken

Development of optically controlled MESFET (OPFET) and avalanche photodiode for high speed optical demodulator and interconnect. This project is funded by US Department of Defense.

Advising Committee/Patrons

Dr. Kang L. Wang
Raytheon Chair Professor of Physical Electronics
Directors, Marco Focus Center on Functional Engineered Nano Architectonics-FENA,
Western Institute of Nano Electronics – WIN
Electrical Engineering Department
66-147B Engineering IV building
Los Angeles, CA 90005-1594
Tel.: (310)-825-1609
Fax: (310)-206-7154
Email: wang@cc.ucla.edu


Professor Sanjay Banerjee
Cockrell Family Regents Chair in Electrical and Computer Engineering
Director, Microelectronics Research Center,
MER 1.606B/R9900
University of Texas Austin, TX 78712-1100
Phone: (512)-471-6730
Fax: (512)-471-8420
Email: banerjee@ece.utexas.edu


Professor Alan P. Genis
Director of Microelectronics Center
Department of Electrical Engineering
Engineering Building, Room 206
Northern Illinois University
Dekalb, IL 60115
Phone : (815) 753-0580 (Office)
Fax : (815) 753-1280
Email : genis@ceet.niu.edu

Contact Get in Touch

  • Address: 18111 Nordhoff Street, Northridge, CA 91330-8346.
  • Phone: (818)-677-7197
  • Fax:(818)-677-7062
  • Email: somnath.chattopadhyay@csun.edu